[−][src]Function core::arch::mips::__msa_fadd_d

pub unsafe fn __msa_fadd_d(a: v2f64, b: v2f64) -> v2f64

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS and target feature msa only.

Vector Floating-Point Addition

The floating-point elements in vector 'a' (two 64-bit floating point numbers) are added to the floating-point elements in 'bc' (two 64-bit floating point numbers). The result is written to vector (two 64-bit floating point numbers)