[−][src]Function core::arch::mips::__msa_sra_w
pub unsafe fn __msa_sra_w(a: v4i32, b: v4i32) -> v4i32
This is supported on MIPS and target feature
msa
only.Vector Shift Right Arithmetic
The elements in vector 'a'(four signed 32-bit integer numbers) are shifted right arithmetic by the number of bits the elements in vector 'b' (four signed 32-bit integer numbers) specify modulo the size of the element in bits.The result is written to vector(four signed 32-bit integer numbers).