[−][src]Function core::arch::mips::__msa_srari_w

pub unsafe fn __msa_srari_w(a: v4i32, imm5: i32) -> v4i32

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS and target feature msa only.

Immediate Shift Right Arithmetic Rounded

The elements in vector 'a'(four signed 32-bit integer numbers) are shifted right arithmetic by imm5 bits.The most significant discarded bit is added to the shifted value (for rounding) and the result is written to vector(four signed 32-bit integer numbers).