[−][src]Function core::arch::mips::__msa_srli_w
pub unsafe fn __msa_srli_w(a: v4i32, imm2: i32) -> v4i32
This is supported on MIPS and target feature
msa
only.Immediate Shift Right Logical
The elements in vector 'a'(four signed 32-bit integer numbers) are shifted right logical by imm2 bits. The result is written to vector(four signed 32-bit integer numbers).