[−][src]Function core::arch::mips64::__msa_addv_b
pub unsafe fn __msa_addv_b(a: v16i8, b: v16i8) -> v16i8
This is supported on MIPS-64 and target feature
msa
only.Vector Add
The elements in vector in a
(sixteen signed 8-bit integer numbers)
are added to the elements in vector b
(sixteen signed 8-bit integer numbers)
The result is written to vector (sixteen signed 8-bit integer numbers).