[−][src]Function core::arch::mips64::__msa_addv_d
pub unsafe fn __msa_addv_d(a: v2i64, b: v2i64) -> v2i64
This is supported on MIPS-64 and target feature
msa
only.Vector Add
The elements in vector in a
(two signed 64-bit integer numbers)
are added to the elements in vector b
(two signed 64-bit integer numbers)
The result is written to vector (two signed 64-bit integer numbers).