[−][src]Function core::arch::mips64::__msa_addv_w
pub unsafe fn __msa_addv_w(a: v4i32, b: v4i32) -> v4i32
This is supported on MIPS-64 and target feature
msa
only.Vector Add
The elements in vector in a
(four signed 32-bit integer numbers)
are added to the elements in vector b
(four signed 32-bit integer numbers)
The result is written to vector (four signed 32-bit integer numbers).