[−][src]Function core::arch::mips64::__msa_aver_s_h
pub unsafe fn __msa_aver_s_h(a: v8i16, b: v8i16) -> v8i16
This is supported on MIPS-64 and target feature
msa only.Vector Signed Average Rounded
The elements in vector a (eight signed 16-bit integer numbers)
are added to the elements in vector b (eight signed 16-bit integer numbers)
The addition of the elements plus 1 (for rounding) is done signed with full precision,
i.e. the result has one extra bit.
Signed division by 2 (or arithmetic shift right by one bit) is performed before
writing the result to vector (eight signed 16-bit integer numbers).