[−][src]Function core::arch::mips64::__msa_mulv_d
pub unsafe fn __msa_mulv_d(a: v2i64, b: v2i64) -> v2i64
This is supported on MIPS-64 and target feature
msa only.Vector Multiply
The integer elements in vector 'a'(two signed 64-bit integer numbers) are multiplied by integer elements in vector 'b'(two signed 64-bit integer numbers) The result is written to vector (two signed 64-bit integer numbers) The most significant half of the multiplication result is discarded.