[−][src]Function core::arch::mips64::__msa_mulv_w
pub unsafe fn __msa_mulv_w(a: v4i32, b: v4i32) -> v4i32
This is supported on MIPS-64 and target feature
msa only.Vector Multiply
The integer elements in vector 'a'(four signed 32-bit integer numbers) are multiplied by integer elements in vector 'b'(four signed 32-bit integer numbers) The result is written to vector (four signed 32-bit integer numbers) The most significant half of the multiplication result is discarded.