[−][src]Function core::arch::mips64::__msa_srli_d

pub unsafe fn __msa_srli_d(a: v2i64, imm1: i32) -> v2i64

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS-64 and target feature msa only.

Immediate Shift Right Logical

The elements in vector 'a'(two signed 64-bit integer numbers) are shifted right logical by imm1 bits. The result is written to vector(two signed 64-bit integer numbers).