[−][src]Function core::arch::mips64::__msa_srlri_b

pub unsafe fn __msa_srlri_b(a: v16i8, imm3: i32) -> v16i8

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS-64 and target feature msa only.

Immediate Shift Right Logical Rounded

The elements in vector 'a'(sixteen signed 8-bit integer numbers) are shifted right logical by imm6 bits.The most significant discarded bit is added to the shifted value (for rounding) and the result is written to vector(sixteen signed 8-bit integer numbers).