1.0.0[−][src]Enum core::sync::atomic::Ordering
Atomic memory orderings
Memory orderings specify the way atomic operations synchronize memory.
In its weakest Relaxed
, only the memory directly touched by the
operation is synchronized. On the other hand, a store-load pair of SeqCst
operations synchronize other memory while additionally preserving a total order of such
operations across all threads.
Rust's memory orderings are the same as LLVM's.
For more information see the nomicon.
Variants (Non-exhaustive)
Relaxed
No ordering constraints, only atomic operations.
Corresponds to LLVM's Monotonic
ordering.
Release
When coupled with a store, all previous operations become ordered
before any load of this value with Acquire
(or stronger) ordering.
In particular, all previous writes become visible to all threads
that perform an Acquire
(or stronger) load of this value.
Notice that using this ordering for an operation that combines loads
and stores leads to a Relaxed
load operation!
This ordering is only applicable for operations that can perform a store.
Corresponds to LLVM's Release
ordering.
Acquire
When coupled with a load, if the loaded value was written by a store operation with
Release
(or stronger) ordering, then all subsequent operations
become ordered after that store. In particular, all subsequent loads will see data
written before the store.
Notice that using this ordering for an operation that combines loads
and stores leads to a Relaxed
store operation!
This ordering is only applicable for operations that can perform a load.
Corresponds to LLVM's Acquire
ordering.
AcqRel
Has the effects of both Acquire
and Release
together:
For loads it uses Acquire
ordering. For stores it uses the Release
ordering.
Notice that in the case of compare_and_swap
, it is possible that the operation ends up
not performing any store and hence it has just Acquire
ordering. However,
AcqRel
will never perform Relaxed
accesses.
This ordering is only applicable for operations that combine both loads and stores.
Corresponds to LLVM's AcquireRelease
ordering.
SeqCst
Like Acquire
/Release
/AcqRel
(for load, store, and load-with-store
operations, respectively) with the additional guarantee that all threads see all
sequentially consistent operations in the same order.
Corresponds to LLVM's SequentiallyConsistent
ordering.
Trait Implementations
impl Copy for Ordering
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impl PartialEq<Ordering> for Ordering
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fn eq(&self, other: &Ordering) -> bool
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#[must_use]
fn ne(&self, other: &Rhs) -> bool
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This method tests for !=
.
impl Eq for Ordering
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impl Clone for Ordering
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fn clone(&self) -> Ordering
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fn clone_from(&mut self, source: &Self)
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Performs copy-assignment from source
. Read more
impl Hash for Ordering
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fn hash<__H: Hasher>(&self, state: &mut __H)
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fn hash_slice<H: Hasher>(data: &[Self], state: &mut H) where
Self: Sized,
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Self: Sized,
Feeds a slice of this type into the given [Hasher
]. Read more
impl Debug for Ordering
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Auto Trait Implementations
Blanket Implementations
impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T> From<T> for T
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(Self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut Self) -> &mut T
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,